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GLVLSI
2007
IEEE
328views VLSI» more  GLVLSI 2007»
16 years 1 months ago
New timing and routability driven placement algorithms for FPGA synthesis
We present new timing and congestion driven FPGA placement algorithms with minimal runtime overhead. By predicting the post-routing critical edges and estimating congestion accura...
Yue Zhuo, Hao Li, Qiang Zhou, Yici Cai, Xianlong H...
AINA
2006
IEEE
16 years 22 days ago
Application Programming Interface for Configuration of Multi-Robot Sensor Networks
In this paper we propose a design of Application Programming Interfaces (APIs) for configuration of Multi-Robot Sensor Networks (MRSNs). Such networks have unique aspects: intenti...
Junya Yamashita, Ryohei Suzuki, Kei Sawai, Hiroki ...
DATE
2003
IEEE
69views Hardware» more  DATE 2003»
15 years 12 months ago
Performance-Directed Retiming for FPGAs Using Post-Placement Delay Information
In today’s deep-submicron designs, the interconnect delays contribute an increasing part to the overall performance of an implementation. Particularly when targeting field prog...
Ulrich Seidl, Klaus Eckl, Frank M. Johannes
TEI
2010
ACM
108views Hardware» more  TEI 2010»
16 years 1 months ago
Cartouche: conventions for tangibles bridging diverse interactive systems
We describe an approach for a class of tangible interaction elements that are applicable across a broad variety of interactive systems. These tangibles share certain physical, vis...
Brygg Ullmer, Zachary Dever, Rajesh Sankaran, Corn...
ICC
2007
IEEE
107views Communications» more  ICC 2007»
16 years 29 days ago
The SILO Architecture for Services Integration, controL, and Optimization for the Future Internet
— We propose a new internetworking architecture that represents a departure from current philosophy and practice, as a contribution to the ongoing debate regarding the future Int...
Rudra Dutta, George N. Rouskas, Ilia Baldine, Arno...