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ICCAD
2005
IEEE
98views Hardware» more  ICCAD 2005»
16 years 3 months ago
Clustering for processing rate optimization
Clustering (or partitioning) is a crucial step between logic synthesis and physical design in the layout of a large scale design. A design verified at the logic synthesis level m...
Chuan Lin, Jia Wang, Hai Zhou
FPGA
2010
ACM
250views FPGA» more  FPGA 2010»
16 years 3 months ago
Variation-aware placement for FPGAs with multi-cycle statistical timing analysis
Deep submicron processes have allowed FPGAs to grow in complexity and speed. However, such technology scaling has caused FPGAs to become more susceptible to the effects of process...
Gregory Lucas, Chen Dong, Deming Chen
ISPD
2010
ACM
207views Hardware» more  ISPD 2010»
16 years 1 months ago
FOARS: FLUTE based obstacle-avoiding rectilinear steiner tree construction
Obstacle-avoiding rectilinear Steiner minimal tree (OARSMT) construction is becoming one of the most sought after problems in modern design flow. In this paper we present FOARS, ...
Gaurav Ajwani, Chris Chu, Wai-Kei Mak
SIGMETRICS
2003
ACM
147views Hardware» more  SIGMETRICS 2003»
15 years 12 months ago
Effect of node size on the performance of cache-conscious B+-trees
In main-memory databases, the number of processor cache misses has a critical impact on the performance of the system. Cacheconscious indices are designed to improve performance b...
Richard A. Hankins, Jignesh M. Patel
173
Voted
HRI
2009
ACM
15 years 11 months ago
Nonverbal leakage in robots: communication of intentions through seemingly unintentional behavior
Human communication involves a number of nonverbal cues that are seemingly unintentional, unconscious, and automatic—both in their production and perception—and convey rich in...
Bilge Mutlu, Fumitaka Yamaoka, Takayuki Kanda, Hir...