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GLVLSI
2005
IEEE
199views VLSI» more  GLVLSI 2005»
16 years 10 days ago
Interconnect delay minimization through interlayer via placement in 3-D ICs
The dependence of the propagation delay of the interlayer 3-D interconnects on the vertical through via location and length is investigated. For a variable vertical through via lo...
Vasilis F. Pavlidis, Eby G. Friedman
ISPD
2005
ACM
168views Hardware» more  ISPD 2005»
16 years 9 days ago
Capo: robust and scalable open-source min-cut floorplacer
In this invited note we describe Capo, an open-source software tool for cell placement, mixed-size placement and floorplanning with emphasis on routability. Capo is among the fas...
Jarrod A. Roy, David A. Papa, Saurabh N. Adya, Hay...
ICCS
2004
Springer
16 years 3 days ago
Evolutionary State Assignment for Synchronous Finite State Machines
: Synchronous finite state machines are very important for digital sequential designs. Among other important aspects, they represent a powerful way for synchronizing hardware comp...
Nadia Nedjah, Luiza de Macedo Mourelle
ICCAD
2002
IEEE
89views Hardware» more  ICCAD 2002»
15 years 11 months ago
Free space management for cut-based placement
IP blocks and large macro cells are increasingly prevalent in physical design, actually causing an increase in the available free space for the dust logic. We observe that top-dow...
Charles J. Alpert, Gi-Joon Nam, Paul Villarrubia
MHVR
1994
119views Multimedia» more  MHVR 1994»
15 years 10 months ago
The Development of a Virtual world for Learning Newtonian Mechanics
We are collaboratively designing "ScienceSpace," a collection of virtual worlds designed to explore the potential utility of physical immersion and multisensory perceptio...
Christopher J. Dede, Marilyn C. Salzman, R. Bowen ...