Gating the clock is an important technique used in low power design to disable unused modules of a circuit. Gating can save power by both preventing unnecessary activiiy in the lo...
- For sub-90nm technology nodes and below, random fluctuations of within-die physical process properties are also known as random on-chip variation (OCV). It impacts on the VLSI/So...
Jun-Fu Huang, Victor C. Y. Chang, Sally Liu, Kelvi...
Numerical simulation of partial differential equations (PDEs) plays a crucial role in predicting the behavior of physical systems and in modern engineering design. However, in ord...
Little treasures in nature often go unnoticed by visitors when roaming about in a national park. Ubiquitous technology with its less intrusive character may be apt to enhance this...
This paper presents a cross-layer approach to jointly design adaptive modulation and coding (AMC) at the physical layer and cooperative truncated automatic repeat request (ARQ) pro...
Morteza Mardani, Jalil S. Harsini, Farshad Lahouti...