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DATE
2009
IEEE
183views Hardware» more  DATE 2009»
16 years 1 months ago
SunFloor 3D: A tool for Networks On Chip topology synthesis for 3D systems on chips
Three-dimensional integrated circuits are a promising approach to address the integration challenges faced by current Systems on Chips (SoCs). Designing an efficient Network on C...
Ciprian Seiculescu, Srinivasan Murali, Luca Benini...
SIMUTOOLS
2008
15 years 8 months ago
Simulation of ad hoc networks: ns-2 compared to JiST/SWANS
For the evaluation of ad hoc network protocols, researchers traditionally use simulations because they easily allow for a large number of nodes and reproducible environment condit...
Elmar Schoch, Michael Feiri, Frank Kargl, Michael ...
VLDB
2005
ACM
115views Database» more  VLDB 2005»
16 years 8 days ago
KLEE: A Framework for Distributed Top-k Query Algorithms
This paper addresses the efficient processing of top-k queries in wide-area distributed data repositories where the index lists for the attribute values (or text terms) of a query...
Sebastian Michel, Peter Triantafillou, Gerhard Wei...
ASPDAC
2009
ACM
108views Hardware» more  ASPDAC 2009»
16 years 1 months ago
Synthesis of networks on chips for 3D systems on chips
Three-dimensional stacking of silicon layers is emerging as a promising solution to handle the design complexity and heterogeneity of Systems on Chips (SoCs). Networks on Chips (N...
Srinivasan Murali, Ciprian Seiculescu, Luca Benini...
PLDI
2004
ACM
16 years 7 days ago
Balancing register allocation across threads for a multithreaded network processor
+ Modern network processors employ multi-threading to allow concurrency amongst multiple packet processing tasks. We studied the properties of applications running on the network p...
Xiaotong Zhuang, Santosh Pande