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CODES
2005
IEEE
16 years 20 days ago
Retargetable generation of TLM bus interfaces for MP-SoC platforms
In order to meet flexibility, performance and energy efficiency constraints, future SoC (System-on-Chip) designs will contain an increasing number of heterogeneous processor cor...
Andreas Wieferink, Rainer Leupers, Gerd Ascheid, H...
PLDI
2005
ACM
16 years 18 days ago
Mitosis compiler: an infrastructure for speculative threading based on pre-computation slices
Speculative parallelization can provide significant sources of additional thread-level parallelism, especially for irregular applications that are hard to parallelize by conventio...
Carlos García Quiñones, Carlos Madri...
LCPC
2004
Springer
16 years 12 days ago
HiLO: High Level Optimization of FFTs
As computing platforms become more and more complex, the task of optimizing performance critical codes becomes more challenging. Recently, more attention has been focused on automa...
Nick Rizzolo, David A. Padua
KBSE
2003
IEEE
16 years 9 days ago
Automatically Inferring Concern Code from Program Investigation Activities
When performing a program evolution task, developers typically spend a significant amount of effort investigating and re-investigating source code. To reduce this effort, we prop...
Martin P. Robillard, Gail C. Murphy
SC
2000
ACM
15 years 11 months ago
Parallel Phylogenetic Inference
Recent advances in DNA sequencing technology have created large data sets upon which phylogenetic inference can be performed. However, current research is limited by the prohibiti...
Quinn Snell, Michael Whiting, Mark J. Clement, Dav...
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