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ICPPW
2005
IEEE
16 years 4 days ago
Speculative Parallel Threading Architecture and Compilation
Thread-level speculation is a technique that brings thread-level parallelism beyond the data-flow limit by executing a piece of code ahead of time speculatively before all its inp...
Xiao-Feng Li, Zhao-Hui Du, Chen Yang, Chu-Cheow Li...
CLUSTER
2007
IEEE
16 years 27 days ago
Balancing productivity and performance on the cell broadband engine
— The Cell Broadband Engine (BE) is a heterogeneous multicore processor, combining a general-purpose POWER architecture core with eight independent single-instructionmultiple-dat...
Sadaf R. Alam, Jeremy S. Meredith, Jeffrey S. Vett...
BMCBI
2011
14 years 10 months ago
Faster Smith-Waterman database searches with inter-sequence SIMD parallelisation
Background: The Smith-Waterman algorithm for local sequence alignment is more sensitive than heuristic methods for database searching, but also more time-consuming. The fastest ap...
Torbjørn Rognes
HPCA
2001
IEEE
16 years 7 months ago
Performance of Hardware Compressed Main Memory
A new memory subsystem called Memory Expansion Technology (MXT) has been built for compressing main memory contents. MXT effectively doubles the physically available memory. This ...
Bülent Abali, Dan E. Poff, Hubertus Franke, T...
HPCC
2007
Springer
15 years 10 months ago
Energy-Aware Online Algorithm to Satisfy Sampling Rates with Guaranteed Probability for Sensor Applications
Abstract. Energy consumption is a major factor that limits the performance of sensor applications. Sensor nodes have varying sampling rates since they face continuously changing en...
Meikang Qiu, Edwin Hsing-Mean Sha