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IEEEPACT
2007
IEEE
16 years 22 days ago
Paceline: Improving Single-Thread Performance in Nanoscale CMPs through Core Overclocking
Under current worst-case design practices, manufacturers specify conservative values for processor frequencies in order to guarantee correctness. To recover some of the lost perfo...
Brian Greskamp, Josep Torrellas
INFOCOM
1999
IEEE
15 years 10 months ago
High Performance IP Routing Table Lookup using CPU Caching
Wire-speed IP (Internet Protocol) routers require very fast routing table lookup for incoming IP packets. The routing table lookup operation is time consuming because the part of ...
Tzi-cker Chiueh, Prashant Pradhan
PVM
1999
Springer
15 years 10 months ago
Building MPI for Multi-Programming Systems Using Implicit Information
Abstract. With the growing importance of fast system area networks in the parallel community, it is becoming common for message passing programs to run in multi-programming environ...
Frederick C. Wong, Andrea C. Arpaci-Dusseau, David...
CLUSTER
2002
IEEE
15 years 11 months ago
Scalable Resource Management in High Performance Computers
Clusters of workstations have emerged as an important platform for building cost-effective, scalable, and highlyavailable computers. Although many hardware solutions are available...
Eitan Frachtenberg, Fabrizio Petrini, Juan Fern&aa...
IPPS
2008
IEEE
16 years 26 days ago
SWAMP: Smith-Waterman using associative massive parallelism
One of the most commonly used tools by computational biologists is some form of sequence alignment. Heuristic alignment algorithms developed for speed and their multiple results s...
Shannon Steinfadt, Johnnie W. Baker