Abstract—Some real-time kernels (such as a recent realtime version of Linux) permit to execute interrupt handlers in dedicated threads, to control their interference on realtime ...
In this paper we formally analyze the interleaver and code design for QAM-based BICM transmissions using the binary reflected Gray code. We develop analytical bounds on the bit e...
Alex Alvarado, Erik Agrell, Leszek Szczecinski, Ar...
We develop an online algorithm called Component Hedge for learning structured concept classes when the loss of a structured concept sums over its components. Example classes inclu...
Wouter M. Koolen, Manfred K. Warmuth, Jyrki Kivine...
We present a new family of subgradient methods that dynamically incorporate knowledge of the geometry of the data observed in earlier iterations to perform more informative gradie...
Transactional memory is a promising, optimistic synchronization mechanism for chip-multiprocessor systems. The simplicity of atomic sections, instead of using explicit locks, is al...