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IEEEPACT
2006
IEEE
16 years 16 days ago
Fast, automatic, procedure-level performance tuning
This paper presents an automated performance tuning solution, which partitions a program into a number of tuning sections and finds the best combination of compiler options for e...
Zhelong Pan, Rudolf Eigenmann
KDD
2008
ACM
186views Data Mining» more  KDD 2008»
16 years 6 months ago
Cut-and-stitch: efficient parallel learning of linear dynamical systems on smps
Multi-core processors with ever increasing number of cores per chip are becoming prevalent in modern parallel computing. Our goal is to make use of the multi-core as well as multi...
Lei Li, Wenjie Fu, Fan Guo, Todd C. Mowry, Christo...
TVLSI
2010
15 years 1 months ago
C-Pack: A High-Performance Microprocessor Cache Compression Algorithm
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...
SIGMETRICS
2009
ACM
151views Hardware» more  SIGMETRICS 2009»
16 years 1 months ago
MapReduce optimization using regulated dynamic prioritization
We present a system for allocating resources in shared data and compute clusters that improves MapReduce job scheduling in three ways. First, the system uses regulated and user-as...
Thomas Sandholm, Kevin Lai
ICRA
2003
IEEE
147views Robotics» more  ICRA 2003»
15 years 11 months ago
Design and control of a novel 4-DOFs parallel robot H4
This paper deals with the design and dynamic control simulation of a new type of 4-DOFs parallel mechanism providing 3 translations and 1 rotation for highspeed handling and machi...
H. B. Choi, Olivier Company, François Pierr...