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DAC
2008
ACM
16 years 7 months ago
Miss reduction in embedded processors through dynamic, power-friendly cache design
Today, embedded processors are expected to be able to run complex, algorithm-heavy applications that were originally designed and coded for general-purpose processors. As a result...
Garo Bournoutian, Alex Orailoglu
IEEEPACT
2005
IEEE
16 years 1 hour ago
An Event-Driven Multithreaded Dynamic Optimization Framework
Dynamic optimization has the potential to adapt the program’s behavior at run-time to deliver performance improvements over static optimization. Dynamic optimization systems usu...
Weifeng Zhang, Brad Calder, Dean M. Tullsen
HIPC
2003
Springer
15 years 11 months ago
Delay and Jitter Minimization in High Performance Internet Computing
Delay and jitter management in high performance active computation is a challenging problem in the emerging area of internet computing. The problem takes a complex new form from it...
Javed I. Khan, Seung Su Yang
APCSAC
2004
IEEE
15 years 10 months ago
Dynamic Reallocation of Functional Units in Superscalar Processors
In the context of general-purpose processing, an increasing number of diverse functional units are added to cover a wide spectrum of applications. However, it is still possible to ...
Marc Epalza, Paolo Ienne, Daniel Mlynek
SC
2009
ACM
16 years 1 months ago
Early performance evaluation of a "Nehalem" cluster using scientific and engineering applications
In this paper, we present an early performance evaluation of a 624-core cluster based on the Intel® Xeon® Processor 5560 (code named “Nehalem-EP”, and referred to as Xeon 55...
Subhash Saini, Andrey Naraikin, Rupak Biswas, Davi...