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ISVLSI
2007
IEEE
121views VLSI» more  ISVLSI 2007»
16 years 1 months ago
Performance of Graceful Degradation for Cache Faults
In sub-90nm technologies, more frequent hard faults pose a serious burden on processor design and yield control. In addition to manufacturing-time chip repair schemes, microarchit...
Hyunjin Lee, Sangyeun Cho, Bruce R. Childers
SC
2003
ACM
16 years 1 days ago
Job Superscheduler Architecture and Performance in Computational Grid Environments
Computational grids hold great promise in utilizing geographically separated heterogeneous resources to solve large-scale complex scientific problems. However, a number of major ...
Hongzhang Shan, Leonid Oliker, Rupak Biswas
TWC
2011
367views more  TWC 2011»
15 years 1 months ago
Improving the Performance of Wireless Ad Hoc Networks Through MAC Layer Design
—In this paper, the performance of the ALOHA and CSMA MAC protocols are analyzed in spatially distributed wireless networks. The main system objective is correct reception of pac...
Mariam Kaynia, Nihar Jindal, Geir E. Øien
3DIC
2009
IEEE
153views Hardware» more  3DIC 2009»
16 years 1 months ago
Junction-level thermal extraction and simulation of 3DICs
Abstract—In 3DICs heat dissipating devices are stacked directly on top of each other leading to a higher heat density than in a comparable 2D chip. 3D integration also moves the ...
Samson Melamed, Thorlindur Thorolfsson, Adi Sriniv...
SERVICES
2008
106views more  SERVICES 2008»
15 years 8 months ago
Distributed Simulation and Web Map Mash-Up for Forest Fire Spread
The emergence of recent XML-based technologies paved the way for new types of architectures and message exchanges on the Internet through Web services. MashUps consist in combinin...
Yosri Harzallah, Vincent Michel, Qi Liu, Gabriel A...