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VLSID
2000
IEEE
90views VLSI» more  VLSID 2000»
15 years 10 months ago
Performance Analysis of Systems with Multi-Channel Communication Architectures
This paper presents a novel system performance analysis technique to support the design of custom communication architectures for System-on-Chip ICs. Our technique fills a gap in...
Kanishka Lahiri, Sujit Dey, Anand Raghunathan
TRETS
2010
142views more  TRETS 2010»
15 years 4 months ago
Performance Analysis Framework for High-Level Language Applications in Reconfigurable Computing
s, and abstractions, typically enabling faster development times than with traditional Hardware ion Languages (HDLs). However, programming at a higher level of abstraction is typic...
John Curreri, Seth Koehler, Alan D. George, Brian ...
CN
2004
109views more  CN 2004»
15 years 5 months ago
Modeling correlations in web traces and implications for designing replacement policies
A number of web cache-related algorithms, such as replacement and prefetching policies, rely on specific characteristics present in the sequence of requests for efficient performa...
Konstantinos Psounis, An Zhu, Balaji Prabhakar, Ra...
ICCS
2009
Springer
16 years 14 days ago
A Holistic Approach for Performance Measurement and Analysis for Petascale Applications
Abstract. Contemporary high-end Terascale and Petascale systems are composed of hundreds of thousands of commodity multi-core processors interconnected with high-speed custom netwo...
Heike Jagode, Jack Dongarra, Sadaf R. Alam, Jeffre...
DATE
2007
IEEE
99views Hardware» more  DATE 2007»
16 years 7 days ago
Instruction trace compression for rapid instruction cache simulation
Modern Application Specific Instruction Set Processors (ASIPs) have customizable caches, where the size, associativity and line size can all be customized to suit a particular ap...
Andhi Janapsatya, Aleksandar Ignjatovic, Sri Param...