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ECOOP
2004
Springer
16 years 4 days ago
Pointer Analysis in the Presence of Dynamic Class Loading
Many compiler optimizations and software engineering tools need precise pointer analyses to be effective. Unfortunately, many Java features, such as dynamic class loading, refle...
Martin Hirzel, Amer Diwan, Michael Hind
POPL
1996
ACM
15 years 11 months ago
A Provably Time-Efficient Parallel Implementation of Full Speculation
that defines abstract costs for measuring or analyzing the performance of computations, (2) to supply the users with a mapping of these costs onto runtimes on various machine model...
John Greiner, Guy E. Blelloch
171
Voted
HPCA
2009
IEEE
16 years 7 months ago
Adaptive Spill-Receive for robust high-performance caching in CMPs
In a Chip Multi-Processor (CMP) with private caches, the last level cache is statically partitioned between all the cores. This prevents such CMPs from sharing cache capacity in r...
Moinuddin K. Qureshi
VLSID
2006
IEEE
142views VLSI» more  VLSID 2006»
16 years 7 months ago
Impact of Configurability and Extensibility on IPSec Protocol Execution on Embedded Processors
- Security protocols, such as IPSec and SSL, are being increasingly deployed in the context of networked embedded systems. The resource-constrained nature of embedded systems and, ...
Nachiketh R. Potlapally, Srivaths Ravi, Anand Ragh...
ISCA
2008
IEEE
148views Hardware» more  ISCA 2008»
16 years 1 months ago
Atomic Vector Operations on Chip Multiprocessors
The current trend is for processors to deliver dramatic improvements in parallel performance while only modestly improving serial performance. Parallel performance is harvested th...
Sanjeev Kumar, Daehyun Kim, Mikhail Smelyanskiy, Y...