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FSE
2009
Springer
159views Cryptology» more  FSE 2009»
16 years 1 months ago
Intel's New AES Instructions for Enhanced Performance and Security
The Advanced Encryption Standard (AES) is the Federal Information Processing Standard for symmetric encryption. It is widely believed to be secure and efficient, and is therefore b...
Shay Gueron
ANCS
2005
ACM
16 years 12 days ago
Segmented hash: an efficient hash table implementation for high performance networking subsystems
Hash tables provide efficient table implementations, achieving O(1), query, insert and delete operations at low loads. However, at moderate or high loads collisions are quite freq...
Sailesh Kumar, Patrick Crowley
DAC
2007
ACM
16 years 7 months ago
Towards An Ultra-Low-Power Architecture Using Single-Electron Tunneling Transistors
Minimizing power consumption is vitally important in embedded system design; power consumption determines battery lifespan. Ultralow-power designs may even permit embedded systems...
Changyun Zhu, Zhenyu (Peter) Gu, Li Shang, Robert ...
IPPS
2005
IEEE
16 years 13 days ago
Performance Implications of Periodic Checkpointing on Large-Scale Cluster Systems
Large-scale systems like BlueGene/L are susceptible to a number of software and hardware failures that can affect system performance. Periodic application checkpointing is a commo...
Adam J. Oliner, Ramendra K. Sahoo, José E. ...
HPCA
2009
IEEE
16 years 7 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...