5281 search results - page 388 / 1057 » Performance evaluation of software architectures |
180
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ICCD
2004
IEEE
16 years 3 months ago
2004
IEEE
Networks-on-Chip (NoC), a new SoC paradigm, has been proposed as a solution to mitigate complex on-chip interconnect problems. NoC architecture consists of a collection of IP core...
173
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SBACPAD
2009
IEEE
16 years 1 months ago
2009
IEEE
RISC processors can be used to face the ever increasing demand for performance required by embedded systems. Nevertheless, this solution comes with the cost of poor code density. ...
167
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MOBICOM
2006
ACM
16 years 24 days ago
2006
ACM
Vehicular AdHoc Networks (VANET) can be treated as special kinds of Delay-tolerant Networks (DTN) where end-toend path might never be possible. As a result, mobile adhoc (MANET) r...
155
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IPPS
2000
IEEE
15 years 11 months ago
2000
IEEE
In a machine that follows the dynamically trace scheduled VLIW (DTSVLIW) architecture, VLIW instructions are built dynamically through an algorithm that can be implemented in hard...
179
Voted
FCCM
2009
IEEE
15 years 10 months ago
2009
IEEE
FPGA has long been considered an attractive platform for high performance implementations of string matching. However, as the size of pattern dictionaries continues to grow, such ...