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» Performance evaluation of software architectures
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DAC
1997
ACM
15 years 11 months ago
A Parallel/Serial Trade-Off Methodology for Look-Up Table Based Decoders
A methodology for architecture exploration of look-up table based decoders is presented. For the degree of parallel processing a trade-off can be made by exploring system level an...
Claus Schneider
CHI
2008
ACM
16 years 7 months ago
Improving the performance of motor-impaired users with automatically-generated, ability-based interfaces
We evaluate two systems for automatically generating personalized interfaces adapted to the individual motor capabilities of users with motor impairments. The first system, SUPPLE...
Krzysztof Z. Gajos, Jacob O. Wobbrock, Daniel S. W...
ISCA
2008
IEEE
107views Hardware» more  ISCA 2008»
16 years 1 months ago
Understanding and Designing New Server Architectures for Emerging Warehouse-Computing Environments
This paper seeks to understand and design nextgeneration servers for emerging “warehousecomputing” environments. We make two key contributions. First, we put together a detail...
Kevin T. Lim, Parthasarathy Ranganathan, Jichuan C...
CODES
2004
IEEE
15 years 10 months ago
Fast exploration of bus-based on-chip communication architectures
As a result of improvements in process technology, more and more components are being integrated into a single System-on-Chip (SoC) design. Communication between these components ...
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...
GECCO
2006
Springer
253views Optimization» more  GECCO 2006»
15 years 10 months ago
A novel approach to optimize clone refactoring activity
Achieving a high quality and cost-effective tests is a major concern for software buyers and sellers. Using tools and integrating techniques to carry out low cost testing are chal...
Salah Bouktif, Giuliano Antoniol, Ettore Merlo, Ma...