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ASPLOS
2008
ACM
15 years 8 months ago
Hardbound: architectural support for spatial safety of the C programming language
The C programming language is at least as well known for its absence of spatial memory safety guarantees (i.e., lack of bounds checking) as it is for its high performance. C'...
Joe Devietti, Colin Blundell, Milo M. K. Martin, S...
TPDS
2010
174views more  TPDS 2010»
15 years 5 months ago
Parallel Two-Sided Matrix Reduction to Band Bidiagonal Form on Multicore Architectures
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
Hatem Ltaief, Jakub Kurzak, Jack Dongarra
EUROSYS
2010
ACM
16 years 3 months ago
Q-Clouds: Managing Performance Interference Effects for QoS-Aware Clouds
Cloud computing offers users the ability to access large pools of computational and storage resources on demand. Multiple commercial clouds already allow businesses to replace, or...
Ripal Nathuji, Aman Kansal, Alireza Ghaffarkhah
IEEEPACT
2002
IEEE
15 years 11 months ago
Transparent Threads: Resource Sharing in SMT Processors for High Single-Thread Performance
Simultaneous Multithreading (SMT) processors achieve high processor throughput at the expense of single-thread performance. This paper investigates resource allocation policies fo...
Gautham K. Dorai, Donald Yeung
176
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LCPC
2004
Springer
16 years 5 days ago
Trimaran: An Infrastructure for Research in Instruction-Level Parallelism
Trimaran is an integrated compilation and performance monitoring infrastructure. The architecture space that Trimaran covers is characterized by HPL-PD, a parameterized processor a...
Lakshmi N. Chakrapani, John C. Gyllenhaal, Wen-mei...