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» Performance evaluation of software architectures
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DSN
2006
IEEE
16 years 26 days ago
Dynamic Verification of Memory Consistency in Cache-Coherent Multithreaded Computer Architectures
—Multithreaded servers with cache-coherent shared memory are the dominant type of machines used to run critical network services and database management systems. To achieve the h...
Albert Meixner, Daniel J. Sorin
DATE
2002
IEEE
114views Hardware» more  DATE 2002»
15 years 11 months ago
A Video Compression Case Study on a Reconfigurable VLIW Architecture
In this paper, we investigate the benefits of a flexible, application-specific instruction set by adding a run-time Reconfigurable Functional Unit (RFU) to a VLIW processor. Preli...
Davide Rizzo, Osvaldo Colavin
IJACTAICIT
2010
104views more  IJACTAICIT 2010»
15 years 4 months ago
An Energy Efficient Shifted Logging Storage Architecture for Write-oriented Workloads
In this paper, we propose SiLo, a novel energy efficient shifted logging storage architecture, for write-oriented workloads. By organizing free storage space of redundant mirrored...
Yinliang Yue
ACSAC
2003
IEEE
15 years 10 months ago
Defending Embedded Systems Against Buffer Overflow via Hardware/Software
Buffer overflow attacks have been causing serious security problems for decades. With more embedded systems networked, it becomes an important research problem to defend embedded ...
Zili Shao, Qingfeng Zhuge, Yi He, Edwin Hsing-Mean...
CODES
2008
IEEE
16 years 1 months ago
Speculative DMA for architecturally visible storage in instruction set extensions
Instruction set extensions (ISEs) can accelerate embedded processor performance. Many algorithms for ISE generation have shown good potential; some of them have recently been expa...
Theo Kluter, Philip Brisk, Paolo Ienne, Edoardo Ch...