Sciweavers

5281 search results - page 368 / 1057
» Performance evaluation of software architectures
Sort
View
ICCD
2007
IEEE
205views Hardware» more  ICCD 2007»
16 years 3 months ago
Hardware libraries: An architecture for economic acceleration in soft multi-core environments
In single processor architectures, computationallyintensive functions are typically accelerated using hardware accelerators, which exploit the concurrency in the function code to ...
David Meisner, Sherief Reda
189
Voted
IPPS
2002
IEEE
15 years 11 months ago
Variable Partitioning and Scheduling of Multiple Memory Architectures for DSP
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
172
Voted
ARCS
2004
Springer
16 years 6 days ago
Cryptonite - A Programmable Crypto Processor Architecture for High-Bandwidth Applications
Cryptographic methods are widely used within networking and digital rights management. Numerous algorithms exist, e.g. spanning VPNs or distributing sensitive data over a shared ne...
Rainer Buchty, Nevin Heintze, Dino Oliva
ACSC
2003
IEEE
16 years 3 days ago
FITS - A Fault Injection Architecture for Time-Triggered Systems
Time-triggered systems require a very high degree of temporal accuracy at critical stages during run time. While many software fault injection environments exist today, none of th...
René Hexel
EUROSYS
2010
ACM
15 years 12 months ago
NOVA: a microhypervisor-based secure virtualization architecture
The availability of virtualization features in modern CPUs has reinforced the trend of consolidating multiple guest operating systems on top of a hypervisor in order to improve pl...
Udo Steinberg, Bernhard Kauer