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ERSA
2009
185views Hardware» more  ERSA 2009»
15 years 4 months ago
Woolcano: An Architecture And Tool Flow For Dynamic Instruction Set Extension On Xilinx Virtex-4 FX
In this paper, we introduce the Woolcano reconfigurable processor architecture. The architecture is based on the Xilinx Virtex-4 FX FPGA and leverages the Auxiliary Processing Uni...
Mariusz Grad, Christian Plessl
DOLAP
2010
ACM
15 years 4 months ago
Integrating OLAP and recommender systems: an evaluation perspective
The integration of OLAP with web-search technologies is a promising research topic. Recommender systems are popular web-search mechanisms, because they can address information ove...
Artus Krohn-Grimberghe, Alexandros Nanopoulos, Lar...
PEPM
1994
ACM
15 years 10 months ago
Improving CPS-Based Partial Evaluation: Writing Cogen by Hand
It is well-known that self-applicable partial evaluation can be used to generate compiler generators: cogen = mix(mix;mix), where mix is the specializer (partial evaluator). Howev...
Anders Bondorf, Dirk Dussart
ICSE
2011
IEEE-ACM
14 years 10 months ago
Pragmatic prioritization of software quality assurance efforts
A plethora of recent work leverages historical data to help practitioners better prioritize their software quality assurance efforts. However, the adoption of this prior work in p...
Emad Shihab
HPCA
2005
IEEE
16 years 7 months ago
A Performance Comparison of DRAM Memory System Optimizations for SMT Processors
Memory system optimizations have been well studied on single-threaded systems; however, the wide use of simultaneous multithreading (SMT) techniques raises questions over their ef...
Zhichun Zhu, Zhao Zhang