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EMSOFT
2008
Springer
15 years 8 months ago
A PRAM and NAND flash hybrid architecture for high-performance embedded storage subsystems
NAND flash-based storage is widely used in embedded systems due to its numerous benefits: low cost, high density, small form factor and so on. However, NAND flash-based storage is...
Jin Kyu Kim, Hyung Gyu Lee, Shinho Choi, Kyoung Il...
HPCA
1995
IEEE
15 years 10 months ago
Software Cache Coherence for Large Scale Multiprocessors
Shared memory is an appealing abstraction for parallel programming. It must be implemented with caches in order toperform well, however, and caches require a coherence mechanism t...
Leonidas I. Kontothanassis, Michael L. Scott
DATE
2006
IEEE
127views Hardware» more  DATE 2006»
16 years 22 days ago
Software implementation of Tate pairing over GF(2m)
Recently, the interest about the Tate pairing over binary fields has decreased due to the existence of efficient attacks to the discrete logarithm problem in the subgroups of su...
Guido Bertoni, Luca Breveglieri, Pasqualina Fragne...
SAC
2006
ACM
16 years 19 days ago
A concurrent reactive Esterel processor based on multi-threading
Esterel is a concurrent synchronous language for developing reactive systems. As an alternative to the classical software and hardware synthesis paths, the reactive processing app...
Xin Li, Reinhard von Hanxleden
RV
2010
Springer
171views Hardware» more  RV 2010»
15 years 4 months ago
Runtime Verification for Software Transactional Memories
Software transactional memories (STMs) promise simple and efficient concurrent programming. Several correctness properties have been proposed for STMs. Based on a bounded conflict ...
Vasu Singh