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» Performance evaluation of software architectures
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HPCA
2006
IEEE
16 years 7 months ago
Reducing resource redundancy for concurrent error detection techniques in high performance microprocessors
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
Sumeet Kumar, Aneesh Aggarwal
ISCA
2002
IEEE
115views Hardware» more  ISCA 2002»
15 years 11 months ago
ReVive: Cost-Effective Architectural Support for Rollback Recovery in Shared-Memory Multiprocessors
This paper presents ReVive, a novel general-purpose rollback recovery mechanism for shared-memory multiprocessors. ReVive carefully balances the conflicting requirements of avail...
Milos Prvulovic, Josep Torrellas, Zheng Zhang
MDM
2005
Springer
170views Communications» more  MDM 2005»
16 years 4 days ago
The role of caching and context-awareness in P2P service discovery
Mobile terminals (cellular phones, PDAs, palmtops etc.) emerge as a new class of small-scale, ad-hoc service providers that share data and functionality via mobile web services’...
Christos Doulkeridis, Vassilis Zafeiris, Michalis ...
ARCS
2004
Springer
16 years 2 days ago
Implementation and Evaluation of a Parallel-External Algorithm for Cycle Structure Computation on a PC-Cluster
Abstract: We report on our experiences with the implementation of a parallel algorithm to compute the cycle structure of a permutation given as an oracle. As a sub-problem, the cyc...
Latifa Boursas, Jörg Keller
175
Voted
ISWC
2002
IEEE
15 years 11 months ago
Evaluating Contextual Information for Wearable Computing
Does the use of a wearable context-aware computer increase task proficiency? User trials have been carried out in an attempt to answer this question. The study involves WECAPC sof...
Huw W. Bristow, Chris Baber, James Cross, Sandra I...