5281 search results - page 236 / 1057 » Performance evaluation of software architectures |
172
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CDES
2006
15 years 8 months ago
2006
- Many memory-sensitive embedded applications can tolerate small performance degradations if doing so can reduce the memory space requirements significantly. This paper explores th...
162
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OTM
2007
Springer
16 years 22 days ago
2007
Springer
Abstract. This paper presents a comparison of performance of various triplestore technologies currently in either production release or beta test. Our comparison of triple-store te...
163
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AINA
2005
IEEE
16 years 7 days ago
2005
IEEE
Input Buffered Switches with Virtual Output Queues(VOQ) design to avoid Head-Of-Line problems, is a primary design of switches that can be scalable to very high speeds. However, t...
188
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TC
2011
15 years 1 months ago
2011
—CMOS scaling has long been a source of dramatic performance gains. However, semiconductor feature size reduction has resulted in increasing levels of operating temperatures and ...
179
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PDP
2010
IEEE
16 years 1 months ago
2010
IEEE
— Due to the multi-core processors, the importance of parallel workloads has increased considerably. However, manycore chips demand new interconnection strategies, since traditio...