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» Performance evaluation of software architectures
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ISSS
1997
IEEE
83views Hardware» more  ISSS 1997»
15 years 10 months ago
A Scheduling and Pipelining Algorithm for Hardware/Software Systems
Given a hardware/software partitioned specification and an allocation (number and type) of processors, we present an algorithm to (1) map each of the software behaviors (or tasks...
Smita Bakshi, Daniel Gajski
HPCA
1996
IEEE
15 years 10 months ago
Co-Scheduling Hardware and Software Pipelines
Exploiting instruction-level parallelism (ILP) is extremely important for achieving high performance in application specific instruction set processors (ASIPs) and embedded process...
Ramaswamy Govindarajan, Erik R. Altman, Guang R. G...
WCRE
2009
IEEE
16 years 1 months ago
On the Relationship Between Change Coupling and Software Defects
Abstract—Change coupling is the implicit relationship between two or more software artifacts that have been observed to frequently change together during the evolution of a softw...
Marco D'Ambros, Michele Lanza, Romain Robbes
DSD
2010
IEEE
190views Hardware» more  DSD 2010»
15 years 6 months ago
Hardware-Based Speed Up of Face Recognition Towards Real-Time Performance
— Real-time face recognition by computer systems is required in many commercial and security applications because it is the only way to protect privacy and security in the sea of...
I. Sajid, Sotirios G. Ziavras, M. M. Ahmed
CLUSTER
2007
IEEE
16 years 29 days ago
High performance virtual machine migration with RDMA over modern interconnects
— One of the most useful features provided by virtual machine (VM) technologies is the ability to migrate running OS instances across distinct physical nodes. As a basis for many...
Wei Huang, Qi Gao, Jiuxing Liu, Dhabaleswar K. Pan...