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» Performance evaluation of software architectures
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CF
2005
ACM
15 years 8 months ago
Dynamic loop pipelining in data-driven architectures
Data-driven array architectures seem to be important alternatives for coarse-grained reconfigurable computing platforms. Their use has provided performance improvements over micro...
João M. P. Cardoso
POPL
2010
ACM
16 years 4 months ago
A simple, verified validator for software pipelining
Software pipelining is a loop optimization that overlaps the execution of several iterations of a loop to expose more instruction-level parallelism. It can result in first-class p...
Jean-Baptiste Tristan, Xavier Leroy
IPPS
2009
IEEE
16 years 1 months ago
Implementing OpenMP on a high performance embedded multicore MPSoC
In this paper we discuss our initial experiences adapting OpenMP to enable it to serve as a programming model for high performance embedded systems. A high-level programming model...
Barbara M. Chapman, Lei Huang, Eric Biscondi, Eric...
PROCEDIA
2011
14 years 9 months ago
10x10: A General-purpose Architectural Approach to Heterogeneity and Energy Efficiency
Two decades of microprocessor architecture driven by quantitative 90/10 optimization has delivered an extraordinary 1000-fold improvement in microprocessor performance, enabled by...
Andrew A. Chien, Allan Snavely, Mark Gahagan
NCA
2009
IEEE
16 years 1 months ago
Functional and Performance Analysis of CalRadio 1 Platform
— CalRadio 1 is an open 802.11b-compatible development platform, designed and developed at UCSD with the aim of providing the research community with an open and fully reprogramm...
Riccardo Manfrin, Andrea Zanella, Michele Zorzi