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CODES
2006
IEEE
16 years 20 days ago
Yield prediction for architecture exploration in nanometer technology nodes: : a model and case study for memory organizations
Process variability has a detrimental impact on the performance of memories and other system components, which can lead to parametric yield loss at the system level due to timing ...
Antonis Papanikolaou, T. Grabner, Miguel Miranda, ...
CODES
2006
IEEE
15 years 10 months ago
Automatic phase detection for stochastic on-chip traffic generation
During System on Chip (SoC) design, Network on Chip (NoC) prototyping is used for adapting NoC parameters to the application running on the chip. This prototyping is currently don...
Antoine Scherrer, Antoine Fraboulet, Tanguy Risset
IEEEAMS
2002
IEEE
15 years 11 months ago
Understanding Consistency Maintenance in Service Discovery Architectures in Response to Message Loss
Current trends suggest future software systems will comprise collections of components that combine and recombine dynamically in reaction to changing conditions. Service-discovery...
Christopher Dabrowski, Kevin L. Mills, Jesse Elder
JUCS
2007
122views more  JUCS 2007»
15 years 6 months ago
A New Architecture for Concurrent Lazy Cyclic Reference Counting on Multi-Processor Systems
: Multi-processor systems have become the standard in current computer architectures. Software developers have the possibility to take advantage of the additional computing power a...
Andrei de Araújo Formiga, Rafael Dueire Lin...
CODES
2003
IEEE
15 years 12 months ago
A fast parallel reed-solomon decoder on a reconfigurable architecture
This paper presents a software implementation of a very fast parallel Reed-Solomon decoder on the second generation of MorphoSys reconfigurable computation platform, which is targ...
Arezou Koohi, Nader Bagherzadeh, Chengzi Pan