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» Performance evaluation of software architectures
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TDSC
2008
102views more  TDSC 2008»
15 years 6 months ago
Temporal Partitioning of Communication Resources in an Integrated Architecture
Integrated architectures in the automotive and avionic domain promise improved resource utilization and enable a better coordination of application subsystems compared to federated...
Roman Obermaisser
SP
2003
IEEE
121views Security Privacy» more  SP 2003»
15 years 12 months ago
Specifying and Verifying Hardware for Tamper-Resistant Software
We specify a hardware architecture that supports tamper-resistant software by identifying an “idealized” hich gives the abstracted actions available to a single user program. ...
David Lie, John C. Mitchell, Chandramohan A. Thekk...
ISPA
2004
Springer
15 years 12 months ago
A Fault Tolerance Protocol for Uploads: Design and Evaluation
This paper investigates fault tolerance issues in Bistro, a wide area upload architecture. In Bistro, clients first upload their data to intermediaries, known as bistros. A destin...
Leslie Cheung, Cheng-Fu Chou, Leana Golubchik, Yan...
ANCS
2007
ACM
15 years 10 months ago
Experimental evaluation of a coarse-grained switch scheduler
Modern high performance routers rely on sophisticated interconnection networks to meet ever increasing demands on capacity. Previous studies have used a combination of analysis an...
Charlie Wiseman, Jonathan S. Turner, Ken Wong, Bra...
CGO
2007
IEEE
15 years 10 months ago
Profile-assisted Compiler Support for Dynamic Predication in Diverge-Merge Processors
Dynamic predication has been proposed to reduce the branch misprediction penalty due to hard-to-predict branch instructions. A recently proposed dynamic predication architecture, ...
Hyesoon Kim, José A. Joao, Onur Mutlu, Yale...