Sciweavers

5281 search results - page 181 / 1057
» Performance evaluation of software architectures
Sort
View
CGO
2010
IEEE
15 years 11 months ago
Efficient compilation of fine-grained SPMD-threaded programs for multicore CPUs
In this paper we describe techniques for compiling finegrained SPMD-threaded programs, expressed in programming models such as OpenCL or CUDA, to multicore execution platforms. Pr...
John A. Stratton, Vinod Grover, Jaydeep Marathe, B...
CODES
2004
IEEE
15 years 10 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
16 years 16 days ago
Multiple Instruction Stream Processor
Microprocessor design is undergoing a major paradigm shift towards multi-core designs, in anticipation that future performance gains will come from exploiting threadlevel parallel...
Richard A. Hankins, Gautham N. Chinya, Jamison D. ...
TROB
2002
169views more  TROB 2002»
15 years 6 months ago
Constructing reconfigurable software for machine control systems
Reconfigurable software is highly desired for automated machine tool control systems for low-cost products and short time to market. In this paper, we propose a software architectu...
Shige Wang, Kang G. Shin
ISCA
2010
IEEE
405views Hardware» more  ISCA 2010»
15 years 11 months ago
Debunking the 100X GPU vs. CPU myth: an evaluation of throughput computing on CPU and GPU
Recent advances in computing have led to an explosion in the amount of data being generated. Processing the ever-growing data in a timely manner has made throughput computing an i...
Victor W. Lee, Changkyu Kim, Jatin Chhugani, Micha...