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CODES
2007
IEEE
16 years 22 days ago
Event-based re-training of statistical contention models for heterogeneous multiprocessors
Embedded single-chip heterogeneous multiprocessor (SCHM) systems experience frequent system events such as task preemption, power-saving voltage/frequency scaling, or arrival of n...
Alex Bobrek, JoAnn M. Paul, Donald E. Thomas
CASES
2008
ACM
15 years 8 months ago
Efficiency and scalability of barrier synchronization on NoC based many-core architectures
Interconnects based on Networks-on-Chip are an appealing solution to address future microprocessor designs where, very likely, hundreds of cores will be connected on a single chip...
Oreste Villa, Gianluca Palermo, Cristina Silvano
IUI
2009
ACM
16 years 3 months ago
Context-based page unit recommendation for web-based sensemaking tasks
Sensemaking tasks require users to perform complex research behaviors to gather and comprehend information from many sources. Such tasks are common and include, for example, resea...
Wen-Huang Cheng, David Gotz
HIPEAC
2009
Springer
16 years 1 months ago
Mapping and Synchronizing Streaming Applications on Cell Processors
Developing streaming applications on heterogenous multi-processor architectures like the Cell is difficult. Currently, application developers need to know about hardware details t...
Maik Nijhuis, Herbert Bos, Henri E. Bal, Cé...
CACM
2011
96views more  CACM 2011»
15 years 1 months ago
Why STM can be more than a research toy
Software Transactional Memory (STM) promises to simplify concurrent programming without requiring specific hardware support. Yet, STM’s credibility lies on the extent to which ...
Aleksandar Dragojevic, Pascal Felber, Vincent Gram...