5123 search results - page 389 / 1025 » Performance and Security Tradeoff |
198
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ICCD
2000
IEEE
2000
IEEE
Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures
15 years 11 months ago
This paper aims to provide a quantitative understanding of the performance of DSP and multimedia applications on very long instruction word (VLIW), single instruction multiple dat...
144
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ISCA
1997
IEEE
15 years 11 months ago
1997
IEEE
The performance tradeoff between hardware complexity and clock speed is studied. First, a generic superscalar pipeline is defined. Then the specific areas of register renaming, ...
194
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ASPDAC
2007
ACM
15 years 10 months ago
2007
ACM
The memory subsystem is a major contributor to the performance, power, and area of complex SoCs used in feature rich multimedia products. Hence, memory architecture of the embedded...
189
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JSS
2006
15 years 6 months ago
2006
In this work, we propose a visual, custom-designed, event-driven interconnect simulation framework to evaluate the performance of off-chip multi-processor/memory communications ar...
179
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SIGMETRICS
2008
ACM
15 years 6 months ago
2008
ACM
In this paper, we discuss recent work on buffer sizing in the context of an ISP's need to offer and guarantee competitive Service Level Agreements (SLAs) to its customers. Si...