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DATE
2006
IEEE
111views Hardware» more  DATE 2006»
16 years 14 days ago
Disclosing the LDPC code decoder design space
The design of future communication systems with high throughput demands will become a critical task, especially when sophisticated channel coding schemes have to be applied. LDPC ...
Torben Brack, Frank Kienle, Norbert Wehn
ICMCS
2006
IEEE
107views Multimedia» more  ICMCS 2006»
16 years 14 days ago
Complexity Scalable 2 : 1 Resolution Downscaling MPEG-2 to WMV Transcoder with Adaptive Error Compensation
Abstract— In this paper, we focus on 2 : 1 spatial resolution downscaling transcoding from MPEG-2 to WMV. We propose two architectures (for sequences with or without B-frames res...
Guobin Shen, Yuwen He, Wanyong Cao, Shipeng Li
ISCAS
2003
IEEE
112views Hardware» more  ISCAS 2003»
15 years 11 months ago
Architectures for function evaluation on FPGAs
This paper presents a new family of architectures for multi-cycle area-efficient evaluation of elementary and composite functions, and an exploration of the design tradeoffs for i...
Nalin Sidahao, George A. Constantinides, Peter Y. ...
SI3D
2009
ACM
15 years 11 months ago
Screen space fluid rendering with curvature flow
We present an approach for rendering the surface of particle-based fluids that is simple to implement, has real-time performance with a configurable speed/quality trade-off, and...
Wladimir J. van der Laan, Simon Green, Miguel Sain...
ICNP
1998
IEEE
15 years 10 months ago
Multicasting at the Host Interface Level in Wormhole Networks
In this paper we address the problem of providing transparent, reliable, and efficient network-level multicasting in wormhole LANs. We describe some alternatives for achieving dea...
Claudio Casetti, Emilio Leonardi, Fabio Neri, Cosi...