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MICRO
2006
IEEE
127views Hardware» more  MICRO 2006»
16 years 11 days ago
A Predictive Performance Model for Superscalar Processors
Designing and optimizing high performance microprocessors is an increasingly difficult task due to the size and complexity of the processor design space, high cost of detailed si...
P. J. Joseph, Kapil Vaswani, Matthew J. Thazhuthav...
PPOPP
2006
ACM
16 years 9 days ago
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hu...
IPPS
2005
IEEE
15 years 12 months ago
Reducing Power with Performance Constraints for Parallel Sparse Applications
Sparse and irregular computations constitute a large fraction of applications in the data-intensive scientific domain. While every effort is made to balance the computational wor...
Guangyu Chen, Konrad Malkowski, Mahmut T. Kandemir...
TMC
2010
137views more  TMC 2010»
15 years 4 months ago
Asymptotic Distortion Performance of Source-Channel Diversity over Multihop and Relay Channels
—A key challenge in the design of real-time wireless multimedia systems is the presence of fading coupled with strict delay constraints. A very effective answer to this problem i...
Karim G. Seddik, Andres Kwasinski, K. J. Ray Liu
MICRO
2010
IEEE
140views Hardware» more  MICRO 2010»
15 years 4 months ago
Moneta: A High-Performance Storage Array Architecture for Next-Generation, Non-volatile Memories
Emerging non-volatile memory technologies such as phase change memory (PCM) promise to increase storage system performance by a wide margin relative to both conventional disks and ...
Adrian M. Caulfield, Arup De, Joel Coburn, Todor I...