Sciweavers

5123 search results - page 150 / 1025
» Performance and Security Tradeoff
Sort
View
CF
2006
ACM
15 years 10 months ago
Performance characteristics of an adaptive mesh refinement calculation on scalar and vector platforms
Adaptive mesh refinement (AMR) is a powerful technique that reduces the resources necessary to solve otherwise intractable problems in computational science. The AMR strategy solv...
Michael L. Welcome, Charles A. Rendleman, Leonid O...
MICRO
2005
IEEE
144views Hardware» more  MICRO 2005»
15 years 12 months ago
A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance
Dynamic voltage and frequency scaling (DVFS) is an effective technique for controlling microprocessor energy and performance. Existing DVFS techniques are primarily based on hardw...
Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vi...
ICC
2007
IEEE
117views Communications» more  ICC 2007»
16 years 20 days ago
A Modified Bit-Flipping Decoding Algorithm for Low-Density Parity-Check Codes
― In this paper, a modified bit-flipping decoding algorithm for low-density parity-check (LDPC) codes is proposed. Both improvement in performance and reduction in decoding delay...
Telex Magloire Nkouatchah Ngatched, Fambirai Takaw...
ASPDAC
2007
ACM
108views Hardware» more  ASPDAC 2007»
15 years 10 months ago
Software Performance Estimation in MPSoC Design
- Estimation tools are a key component of system-level methodologies, enabling a fast design space exploration. Estimation of software performance is essential in current software-...
Márcio Oyamada, Flávio Rech Wagner, ...
ASPLOS
1991
ACM
15 years 10 months ago
Performance Evaluation of Memory Consistency Models for Shared Memory Multiprocessors
The memory consistency model supported by a multiprocessor architecture determines the amount of buffering and pipelining that may be used to hide or reduce the latency of memory ...
Kourosh Gharachorloo, Anoop Gupta, John L. Henness...