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» Performance and Functional Verification of Microprocessors
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HPCA
2003
IEEE
16 years 6 months ago
Deterministic Clock Gating for Microprocessor Power Reduction
With the scaling of technology and the need for higher performance and more functionality, power dissipation is becoming a major bottleneck for microprocessor designs. Pipeline ba...
Hai Li, Swarup Bhunia, Yiran Chen, T. N. Vijaykuma...
ISCA
2000
IEEE
91views Hardware» more  ISCA 2000»
15 years 10 months ago
Performance analysis of the Alpha 21264-based Compaq ES40 system
This paper evaluates performance characteristics of the Compaq ES40 shared memory multiprocessor. The ES40 system contains up to four Alpha 21264 CPU’s together with a high-perf...
Zarka Cvetanovic, Richard E. Kessler
DAC
2006
ACM
16 years 6 months ago
Shielding against design flaws with field repairable control logic
Correctness is a paramount attribute of any microprocessor design; however, without novel technologies to tame the increasing complexity of design verification, the amount of bugs...
Ilya Wagner, Valeria Bertacco, Todd M. Austin
CSL
2004
Springer
15 years 9 months ago
A Functional Scenario for Bytecode Verification of Resource Bounds
We consider a scenario where (functional) programs in pre-compiled form are exchanged among untrusted parties. Our contribution is a system of annotations for the code that can be ...
Roberto M. Amadio, Solange Coupet-Grimal, Silvano ...
ISLPED
2006
ACM
73views Hardware» more  ISLPED 2006»
15 years 11 months ago
Substituting associative load queue with simple hash tables in out-of-order microprocessors
Buffering more in-flight instructions in an out-of-order microprocessor is a straightforward and effective method to help tolerate the long latencies generally associated with ...
Alok Garg, Fernando Castro, Michael C. Huang, Dani...