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WSC
1997
15 years 8 months ago
A Hybrid Tool for the Performance Evaluation of NUMA Architectures
We present a system for describing and solving closed queuing network models of the memory access performance of NUMA architectures. The system consists of a model description lan...
James Westall, Robert Geist
CVPR
2008
IEEE
16 years 8 months ago
Tensor reduction error analysis - Applications to video compression and classification
Tensor based dimensionality reduction has recently been extensively studied for computer vision applications. To our knowledge, however, there exist no rigorous error analysis on ...
Chris H. Q. Ding, Heng Huang, Dijun Luo
OOPSLA
2005
Springer
16 years 2 days ago
Demand-driven points-to analysis for Java
We present a points-to analysis technique suitable for environments with small time and memory budgets, such as just-in-time (JIT) compilers and interactive development environmen...
Manu Sridharan, Denis Gopan, Lexin Shan, Rastislav...
ERSA
2006
147views Hardware» more  ERSA 2006»
15 years 8 months ago
Code Partitioning for Reconfigurable High-Performance Computing: A Case Study
In this case study, various ways to partition a code between the microprocessor and FPGA are examined. Discrete image convolution operation with separable kernel is used as the ca...
Volodymyr V. Kindratenko
SIGMETRICS
2003
ACM
199views Hardware» more  SIGMETRICS 2003»
15 years 11 months ago
Data cache locking for higher program predictability
Caches have become increasingly important with the widening gap between main memory and processor speeds. However, they are a source of unpredictability due to their characteristi...
Xavier Vera, Björn Lisper, Jingling Xue