6709 search results - page 388 / 1342 » Performance Modelling of the Computational Hardware: A Stati... |
158
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ICCAD
2006
IEEE
16 years 3 months ago
2006
IEEE
With shrinking feature size and growing integration density in the Deep Sub-Micron technologies, the global buses are fast becoming the “weakest-links” in VLSI design. They ha...
215
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GECCO
2008
Springer
15 years 7 months ago
2008
Springer
Evolutionary Algorithms’ (EAs’) application to real world optimization problems often involves expensive fitness function evaluation. Naturally this has a crippling effect on ...
192
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ACHI
2008
IEEE
16 years 1 months ago
2008
IEEE
Computers have been widely deployed to our daily lives, but human-computer interaction still lacks intuition. Researchers intend to resolve these shortcomings by augmenting tradit...
182
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ISCA
1999
IEEE
15 years 11 months ago
1999
IEEE
Modern compilers must expose sufficient amounts of Instruction-Level Parallelism (ILP) to achieve the promised performance increases of superscalar and VLIW processors. One of the...
235
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CVPR
2012
IEEE
13 years 9 months ago
2012
IEEE
In this paper, we present an efficient general-purpose objective no-reference (NR) image quality assessment (IQA) framework based on unsupervised feature learning. The goal is to...