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ICCAD
1995
IEEE
95views Hardware» more  ICCAD 1995»
15 years 10 months ago
A sequential quadratic programming approach to concurrent gate and wire sizing
With an ever-increasing portion of the delay in highspeed CMOS chips attributable to the interconnect, interconnect-circuit design automation continues to grow in importance. By t...
Noel Menezes, Ross Baldick, Lawrence T. Pileggi
IPPS
2007
IEEE
16 years 27 days ago
Enhancing Portability of HPC Applications across High-end Computing Platforms
Fast hardware turnover in supercomputing centers, stimulated by rapid technological progress, results in high heterogeneity among HPC platforms, and necessitates that applications...
Magdalena Slawiñska, Jaroslaw Slawinski, Da...
DATE
2010
IEEE
174views Hardware» more  DATE 2010»
15 years 4 months ago
An HVS-based Adaptive Computational Complexity Reduction Scheme for H.264/AVC video encoder using Prognostic Early Mode Exclusio
The H.264/AVC video encoder standard significantly improves the compression efficiency by using variable block-sized Inter (P) and Intra (I) Macroblock (MB) coding modes. In this p...
Muhammad Shafique, Bastian Molkenthin, Jörg H...
CVPR
2009
IEEE
17 years 1 months ago
Learning Visual Flows: A Lie Algebraic Approach
We present a novel method for modeling dynamic visual phenomena, which consists of two key aspects. First, the in- tegral motion of constituent elements in a dynamic scene is ca...
Dahua Lin, W. Eric L. Grimson, John W. Fisher III
FPL
2006
Springer
125views Hardware» more  FPL 2006»
15 years 10 months ago
Application-Specific Memory Interleaving for FPGA-Based Grid Computations: A General Design Technique
Many compute-intensive applications generate single result values by accessing clusters of nearby points in grids of one, two, or more dimensions. Often, the performance of FGPA i...
Tom Van Court, Martin C. Herbordt