6709 search results - page 269 / 1342 » Performance Modelling of the Computational Hardware: A Stati... |
142
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ICCAD
2005
IEEE
16 years 3 months ago
2005
IEEE
— One of the critical goals in code optimization for MPSoC architectures is to minimize the number of off-chip memory accesses. This is because such accesses can be extremely cos...
157
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ASAP
2009
IEEE
15 years 10 months ago
2009
IEEE
An implementation of a radix-4 approximate squaring circuit is described employing a new operand dual recoding technique. Approximate squaring circuits have numerous applications ...
215
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ICCAD
2010
IEEE
15 years 4 months ago
2010
IEEE
Clock mesh is popular in high performance VLSI design because it is more robust against variations than clock tree at a cost of higher power consumption. In this paper, we propose ...
181
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HPCC
2010
Springer
15 years 6 months ago
2010
Springer
Abstract--This paper examines the initial parallel implementation of SCATTER, a computationally intensive inelastic neutron scattering routine with polycrystalline averaging capabi...
171
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SRDS
2006
IEEE
16 years 18 days ago
2006
IEEE
Availability prediction in a telecommunication system plays a crucial role in its management, either by alerting the operator to potential failures or by proactively initiating pr...