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EUROPAR
2010
Springer
15 years 7 months ago
Efficient Address Mapping of Shared Cache for On-Chip Many-Core Architecture
Abstract. Performance of the on-chip cache is critical for processor. The multithread program model usually employed by on-chip many-core architectures may have effects on cache ac...
Fenglong Song, Dongrui Fan, Zhiyong Liu, Junchao Z...
JIIS
2008
104views more  JIIS 2008»
15 years 6 months ago
Transaction Management for Flash Media Databases in Portable Computing Environments
Flash memory is becoming a major database storage in building embedded systems or portable devices because of its non-volatile, shock-resistant, power-economic nature, and fast acc...
Siwoo Byun
NOCS
2007
IEEE
16 years 22 days ago
Towards Open Network-on-Chip Benchmarks
Measuring and comparing performance, cost, and other features of advanced communication architectures for complex multi core/multiprocessor systems on chip is a significant challe...
Cristian Grecu, André Ivanov, Partha Pratim...
EMSOFT
2007
Springer
15 years 10 months ago
A unified practical approach to stochastic DVS scheduling
This paper deals with energy-aware real-time system scheduling using dynamic voltage scaling (DVS) for energy-constrained embedded systems that execute variable and unpredictable ...
Ruibin Xu, Rami G. Melhem, Daniel Mossé
WSC
1997
15 years 7 months ago
Visualizing Parallel Simulations in Network Computing Environments: A Case Study
Parallel discrete event simulation systems (PDES) are used to simulate large-scale applications such as modeling telecommunication networks, transportation grids, and battlefield...
Christopher D. Carothers, Brad Topol, Richard Fuji...