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» Performance Evaluation for Global Computation
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ICCAD
2006
IEEE
119views Hardware» more  ICCAD 2006»
16 years 3 months ago
FastRoute: a step to integrate global routing into placement
Because of the increasing dominance of interconnect issues in advanced IC technology, placement has become a critical step in the IC design flow. To get accurate interconnect inf...
Min Pan, Chris C. N. Chu
ENTCS
2007
94views more  ENTCS 2007»
15 years 6 months ago
Virtual Organizations in Arigatoni
Arigatoni is a lightweight overlay network that deploys the Global Computing Paradigm over the Internet. Communication for over the behavioral units of the overlay is performed by...
Michel Cosnard, Luigi Liquori, Raphaël Chand
MICRO
2007
IEEE
168views Hardware» more  MICRO 2007»
16 years 28 days ago
Global Multi-Threaded Instruction Scheduling
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
Guilherme Ottoni, David I. August
TCAD
2002
72views more  TCAD 2002»
15 years 6 months ago
Wire width planning for interconnect performance optimization
Abstract--In this paper, we study wire width planning for interconnect performance optimization in an interconnect-centric design flow. We first propose some simplified, yet near-o...
Jason Cong, David Zhigang Pan
ASPLOS
2008
ACM
15 years 8 months ago
Communication optimizations for global multi-threaded instruction scheduling
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
Guilherme Ottoni, David I. August