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189
Voted
IEEEPACT
2000
IEEE
15 years 11 months ago
2000
IEEE
Modern computers have taken advantage of the instruction-level parallelism (ILP) available in programs with advances in both architecture and compiler design. Unfortunately, large...
152
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DAC
2004
ACM
16 years 7 months ago
2004
ACM
With deep-sub-micron (DSM) technology, statistical timing analysis becomes increasingly crucial to characterize signal transmission over global interconnect wires. In this paper, ...
168
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ASPDAC
2005
ACM
15 years 8 months ago
2005
ACM
— As microprocessor technology continues to scale into the nanometer regime, recent studies show that interconnect delay will be a limiting factor for performance, and multiple c...
156
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ASPDAC
2006
ACM
16 years 17 days ago
2006
ACM
— The main thesis of this paper is to perform a reliability based performance analysis for a shared latch inserted global interconnect under uncertainty. We first put forward a ...
167
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GECCO
2006
Springer
15 years 10 months ago
2006
Springer
In this paper, we present an empirical comparison of some Differential Evolution variants to solve global optimization problems. The aim is to identify which one of them is more s...