6750 search results - page 201 / 1350 » Performance Analysis Framework for Layout Analysis Methods |
388
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INFOCOM
2012
IEEE
14 years 4 months ago
2012
IEEE
We derive bounds on the expected loss for authentication protocols in channels which are constrained due to noisy
conditions and communication costs. This is motivated by a
numbe...
183
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ICCAD
2009
IEEE
15 years 4 months ago
2009
IEEE
Double patterning lithography (DPL) is a likely resolution enhancement technique for IC production in 32nm and below technology nodes. However, DPL gives rise to two independent, ...
165
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SIAMIS
2008
15 years 6 months ago
2008
We present novel wavelet-based inpainting algorithms. Applying ideas from anisotropic regularization and diffusion our models can better handle degraded pixels at edges. We interp...
153
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KDD
2002
ACM
16 years 7 months ago
2002
ACM
In this paper, we focus on methodology of finding a classifier with a minimal cost in presence of additional performance constraints. ROCCH analysis, where accuracy and cost are i...
155
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DATE
2006
IEEE
16 years 18 days ago
2006
IEEE
This paper focuses on statistical interconnect timing analysis in a parameterized block-based statistical static timing analysis tool. In particular, a new framework for performin...