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DATE
2009
IEEE
113views Hardware» more  DATE 2009»
16 years 1 months ago
Algorithms for the automatic extension of an instruction-set
Abstract—In this paper, two general algorithms for the automatic generation of instruction-set extensions are presented. The basic instruction set of a reconfigurable architectu...
Carlo Galuzzi, Dimitris Theodoropoulos, Roel Meeuw...
ISCC
2009
IEEE
210views Communications» more  ISCC 2009»
16 years 1 months ago
Towards a Java bytecodes compiler for Nios II soft-core processor
Reconfigurable computing is one of the most recent research topics in computer science. The Altera™ Nios II soft-core processor can be included in a large set of reconfigurable ...
Willian dos Santos Lima, Renata Spolon Lobato, Ale...
WABI
2009
Springer
181views Bioinformatics» more  WABI 2009»
16 years 1 months ago
Decoding Synteny Blocks and Large-Scale Duplications in Mammalian and Plant Genomes
Abstract. The existing synteny block reconstruction algorithms use anchors (e.g., orthologous genes) shared over all genomes to construct the synteny blocks for multiple genomes. T...
Qian Peng, Max A. Alekseyev, Glenn Tesler, Pavel A...
SMA
2009
ACM
228views Solid Modeling» more  SMA 2009»
16 years 1 months ago
Robust mesh reconstruction from unoriented noisy points
We present a robust method to generate mesh surfaces from unoriented noisy points in this paper. The whole procedure consists of three steps. Firstly, the normal vectors at points...
Hoi Sheung, Charlie C. L. Wang
RSP
2008
IEEE
182views Control Systems» more  RSP 2008»
16 years 1 months ago
From Application to ASIP-based FPGA Prototype: a Case Study on Turbo Decoding
ASIP-based implementations constitute a key trend in SoC design enabling optimal tradeoffs between performance and flexibility. This paper details a case study of an ASIP-based im...
Olivier Muller, Amer Baghdadi, Michel Jéz&e...