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183
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VLSID
2004
IEEE
16 years 7 months ago
2004
IEEE
System-on-Chip (SoC) design methodologies rely heavily on reuse of intellectual property (IP) blocks. IP reuse is a labour intensive and time consuming process as IP blocks often ...
169
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VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
In preemptive real-time systems, a tighter estimate of the Worst Case Response Time(WCRT) of the tasks can be obtained if the layout of the tasks in memory is included in the esti...
163
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VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
We give an algorithm to model any given multiple stuck-at fault as a single stuck-at fault. The procedure requires insertion of at most ? ? ? modeling gates, when the multiplicity...
191
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VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
Directed test program-based verification or formal verification methods are usually quite ineffective on large cachecoherent, non-uniform memory access (CC-NUMA) multiprocessors b...
147
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VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
We propose the redundancy identification of wire replacement faults. The solutions rely on the satisfiability (SAT) formulation of redundancy identification, augmented with the me...