5799 search results - page 748 / 1160 » Patterns Generate Architectures |
209
Voted
PLDI
1995
ACM
15 years 10 months ago
1995
ACM
Traditional list schedulers order instructions based on an optimistic estimate of the load latency imposed by the hardware and therefore cannot respond to variations in memory lat...
168
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SC
1995
ACM
15 years 10 months ago
1995
ACM
: Data distribution is one of the key aspects that a parallelizing compiler for a distributed memory architecture should consider, in order to get efficiency from the system. The ...
202
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CASES
2008
ACM
15 years 8 months ago
2008
ACM
Various commercial programmable compute platforms have their processor architecture enhanced with field-programmable gate arrays (FPGAs). In a common usage scenario, an applicatio...
206
Voted
DAC
2005
ACM
15 years 8 months ago
2005
ACM
In this paper we discuss an efficient design flow from Matlab® to FPGA. Employing Matlab for algorithm research and as system level language allows efficient transition from algo...
189
Voted
DAC
2005
ACM
15 years 8 months ago
2005
ACM
Minimizing power consumption is one of the most important objectives in IC design. Resizing gates and assigning different Vt’s are common ways to meet power and timing budgets. ...