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BROADNETS
2006
IEEE
15 years 10 months ago
SMART: An Optical Infrastructure for Future Internet
A new scalable optical network infrastructure SMART is proposed based on light-trails and hypernetwork architecture. The underlying physical network of SMART is a reconfigurable WD...
Si-Qing Zheng, Ashwin Gumaste
DELTA
2004
IEEE
15 years 10 months ago
Scan Test of IP Cores in an ATE Environment
Manufacturing test of chips made of multiple IP cores requires different techniques if ATE is used. As scan chains are commonly used as access paths to the DUT, ATE architectures ...
Luca Schiano, Yong-Bin Kim, Fabrizio Lombardi
CHES
2006
Springer
125views Cryptology» more  CHES 2006»
15 years 10 months ago
Implementing the Elliptic Curve Method of Factoring in Reconfigurable Hardware
A novel portable hardware architecture of the Elliptic Curve Method of factoring, designed and optimized for application in the relation collection step of the Number Field Sieve,...
Kris Gaj, Soonhak Kwon, Patrick Baier, Paul Kohlbr...
DAC
2006
ACM
15 years 10 months ago
Steiner network construction for timing critical nets
Conventionally, signal net routing is almost always implemented as Steiner trees. However, non-tree topology is often superior on timing performance as well as tolerance to open f...
Shiyan Hu, Qiuyang Li, Jiang Hu, Peng Li
186
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DSD
2006
IEEE
131views Hardware» more  DSD 2006»
15 years 10 months ago
Designing Efficient Irregular Networks for Heterogeneous Systems-on-Chip
Abstract-- Networks-on-Chip will serve as the central integration platform in future complex SoC designs, composed of a large number of heterogeneous processing resources. Most res...
Christian Neeb, Norbert Wehn