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APNOMS
2007
Springer
15 years 11 months ago
Constella: A Complete IP Network Topology Discovery Solution
Network topology discovery for the large IP networks is a very well studied area of research. Most of the previous work focus on improving the efficiency in terms of time and compl...
Fawad Nazir, Tallat Hussain Tarar, Faran Javed Cha...
AAAI
2000
15 years 8 months ago
The Systems Engineering Process Activities (SEPA) Methodology and Tool Suite
or cone, abstraction is chosen to represent a spectrum of user inputs/requirements that are narrowed, refined, and structured into a system design. User inputs require refinement f...
K. Suzanne Barber, Thomas J. Graser, Paul Grisham,...
DAC
2000
ACM
16 years 7 months ago
GTX: the MARCO GSRC technology extrapolation system
Technology extrapolation -- the calibration and prediction of achievable design in future technology generations ? drives the evolution of VLSI system architectures, design method...
Andrew E. Caldwell, Yu Cao, Andrew B. Kahng, Farin...
DAC
2000
ACM
16 years 7 months ago
Memory aware compilation through accurate timing extraction
Memory delays represent a major bottleneck in embedded systems performance. Newer memory modules exhibiting efficient access modes (e.g., page-, burst-mode) partly alleviate this ...
Peter Grun, Nikil D. Dutt, Alexandru Nicolau
VLSID
2008
IEEE
117views VLSI» more  VLSID 2008»
16 years 7 months ago
Single Event Upset: An Embedded Tutorial
Abstract-- With the continuous downscaling of CMOS technologies, the reliability has become a major bottleneck in the evolution of the next generation systems. Technology trends su...
Fan Wang, Vishwani D. Agrawal