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156
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DAC
1996
ACM
15 years 11 months ago
1996
ACM
Abstract-- It is impractical to verify multiplier or divider circuits entirely at the bit-level using ordered Binary Decision Diagrams (BDDs), because the BDD representations for t...
174
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DAC
1996
ACM
15 years 11 months ago
1996
ACM
In this paper, we outline general design steps of our synthesis tool to realize application specific co-processors such that for a given scientific application having intensive ite...
150
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DAC
1996
ACM
15 years 11 months ago
1996
ACM
In this paper, we describe how we have improved the efficiency of a finite-element method for interconnect resistance extraction by introducingarticulation nodes in the finiteelem...
199
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DAC
1996
ACM
15 years 11 months ago
1996
ACM
A novel methodology for circuit design and automatic layout generation is proposed for a class of mixed-signal circuits in presence of layout parasitics and substrate induced nois...
197
click to vote
DAC
1996
ACM
15 years 11 months ago
1996
ACM
ion. Production use of text-based methodology has enabled designers to capture designs of hundreds of thousands of gates using graphic ESDA tools. Source: Data Quest (Verilog/VHDL ...