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ISCA
2006
IEEE
162views Hardware» more  ISCA 2006»
16 years 1 months ago
Design and Management of 3D Chip Multiprocessors Using Network-in-Memory
Long interconnects are becoming an increasingly important problem from both power and performance perspectives. This motivates designers to adopt on-chip network-based communicati...
Feihui Li, Chrysostomos Nicopoulos, Thomas D. Rich...
267
Voted
CCECE
2006
IEEE
16 years 1 months ago
Survey of Biological High Performance Computing: Algorithms, Implementations and Outlook Research
During recent years there has been an explosive growth of biological data coming from genome projects, proteomics, protein structure determination, and the rapid expansion in digi...
Nasreddine Hireche, J. M. Pierre Langlois, Gabriel...
ISCA
2011
IEEE
386views Hardware» more  ISCA 2011»
14 years 11 months ago
Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs
Emerging memory technologies such as STT-RAM, PCRAM, and resistive RAM are being explored as potential replacements to existing on-chip caches or main memories for future multi-co...
Asit K. Mishra, Xiangyu Dong, Guangyu Sun, Yuan Xi...
IPPS
2008
IEEE
16 years 1 months ago
Financial modeling on the cell broadband engine
High performance computing is critical for financial markets where analysts seek to accelerate complex optimizations such as pricing engines to maintain a competitive edge. In th...
Virat Agarwal, Lurng-Kuo Liu, David A. Bader
IROS
2006
IEEE
100views Robotics» more  IROS 2006»
16 years 1 months ago
Towards On-Line Trajectory Computation
Abstract— This paper proposes a new way of trajectory generation for industrial manipulators. A real-time algorithm for the interpolation of synchronized and time-optimal manipul...
Torsten Kröger, Adam Tomiczek, Friedrich M. W...